e Tessent® TestKompress® with Automotivegrade
ATPG software tool addresses the need
for very high-quality ICs for automotive
electronics by targeting defects within
cells, at the transistor level. Traditional test
methods are designed to capture defects in
the interconnect between cells, and therefore
miss a large, and growing, number of defects
that occur in today’s complex transistors.
Capturing these otherwise undetectable
defects helps the makers of digital ICs meet
the ISO 26262 goal of zero defective parts per
billion (DPPB).
Tessent TestKompress with Automotivegrade
ATPG contains a suite of fault models
and test pattern generation applications
that can be used separately or together. e
software is the result of decades of research in
cell-aware, layout-aware, and defect-oriented
test and modeling. ese technologies were
developed in collaboration with foundries,
fabless companies, and integrated device
manufacturers (IDMs). Tessent TestKompress
with Automotive-grade ATPG has been
validated on millions of tested devices
representing mature planar process nodes, as
well as state-of-the-art FinFET processes.
With Tessent TestKompress Automotivegrade
ATPG, users can target not only the
cell-based faults, but can also start to introduce
the same layout-based technology to address
critical area-based interconnect and cellneighborhood
faults. Enabling structural test
to reach DPPM levels that would otherwise
only be possible by combining ATPG patterns
with extremely expensive functional or
system-level tests.
Mentor’s fault model extraction makes
TestKompress cell-aware stand out from the
crowd.
e fault extraction uses layout- annotated
Spice representation of the cells to identify
the location of possible transistor, bridge,
open, and port defects. e extraction process
automatically ranks bridges and opens on
critical area, allowing ATPG to focus on the
most important defect locations.
As the automotive electronics industry
creates larger and more complex chips at the
most advanced process nodes, they can rely on
the Tessent family of products from Siemens
to help them meet their required IC quality.
To learn more, download the white paper:
https://go.mentor.com/55fOr
the product website:
https://www.mentor. com/tessent
Figure 1:
Automotive-grade
ATPG target defects
at the transistor level
inside cells, between
adjacent cells, and
in the interconnect
based on critical area
analysis.
Mentor, a Siemens Business, is a
technology leader in electronic
design automation (EDA), provides
software and hardware design
solutions that enable companies to
develop better electronic and
mechanical products faster and more
cost-effectively.
The company offers innovative
products and solutions that help
engineers overcome the design
challenges they face in the
increasingly complex worlds of board
and chip design.
Mentor, has the broadest industry
portfolio of best-in-class products
and is the only EDA company with an
embedded software solution.
Services
Design-Through-Manufacturing PCB
Systems Development
Mechanical Analysis Functional
Verifi cation Design to Silicon
Products
Integrated Electrical Systems
Engineering
Electronic System Level (ESL) Design
Embedded Systems Design
Contact details
Mentor, a Siemens Business
Rivergate
Newbury Business Park London Road
Berkshire RG14 2QB
tel: +44 (0)1635 811411
www.mentor.com
www.mentor.com
Automotive-grade ATPG
Siemens IC test for Zero DPPM
Figure 2: Analyze the
power system using
the new Capital Load
Analyzer software
to ensure suffi cient
power for each
fl ight phase, even
in emergency
conditions.
The Tessent test software brings advanced automation to the challenges of
zero-defect ICs for automotive electronics.
10 www.newelectronics.co.uk
/55fOr
/www.mentor
/www.mentor.com
/www.mentor.com
/www.newelectronics.co.uk